The Arkville FPGA Gen5 PCIe DMA solution facilitates seamless data transport between FPGA logic and host memory, achieving remarkable bandwidth rates of up to 60 GBytes/s bidirectionally. This high-throughput, low-latency interconnect significantly enhances overall system efficiency by offloading CPU workload, eliminating unnecessary memory copies, and offering zero-copy user space memory buffers. The Arkville solution is equipped with industry-standard APIs for software engineers and RTL interfaces for hardware developers, thus optimizing operations across varied GPP/FPGA applications. Compatibility extends across both Intel and AMD/Xilinx FPGA platforms, ensuring vendor-agnostic deployment to support wide-ranging packet processing demands.
Key features include concurrent full-duplex upstream and downstream data movement, AXI Streaming interfaces for packet handling, and support for up to 1 Tbps burst traffic. It houses a dedicated Application BAR (ABAR) AXI4-Master for enhanced application integration. Extensively tested within CI/CD pipelines using Jenkins, Arkville's adaptability and versatility are showcased through example designs like the four-port 10 GbE and single-port 100 GbE configurations, which help speed client development and market readiness. By future-proofing with DPDK and AXI standards, this IP core is highly adaptable for evolving network needs.
