All IPs > Analog & Mixed Signal > PLL > Aeonic Generate
Aeonic Generate is a family of digital PLL solutions, providing synthesizable, area-efficient clock generation for SoCs. They are noted for fine-grained droop response and DVFS control, enabling flexible clocking architectures. These modules are not only highly observable and adaptable across process nodes, but also integrate seamlessly from core VDD supply, making them adaptable for various applications from datacenter to automotive industries.
| Class | Value |
|---|---|
| Categories |
Analog & Mixed Signal > PLL Analog & Mixed Signal > Clock Synthesizer Graphic & Peripheral > Clock Generator |
| Availability | All Countries & Regions |
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