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All IPs > Interface Controller & PHY > I2C > A TSMC 22nm Wirebond I/O Library with ultra-low leakage 1.8V GPIO, 1.8V I2C ODIO, 1.8V analog cell and associated ESD

A TSMC 22nm Wirebond I/O Library with ultra-low leakage 1.8V GPIO, 1.8V I2C ODIO, 1.8V analog cell and associated ESD

From Certus Semiconductor

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Description

This is an ultra-low leakage library. The GPIO has a typical leakage of only 150pA from VDDIO and 1nA from VDD.
The library has a GPIO and an ODIO. The GPIO cell set can be configured as input or output and has an internal 50K
ohm pull-up or pull-down resistor. Cells for I/O and core power and ground with built-in ESD circuitry are included. A
power-on-control circuit is integrated into an available VDDIO cell. The library includes pads for analog signals and a 6.5V
one-time-programming voltage. The GPIO can do TX and RX up to 100MHz. The ODIO is I2C compliant. ESD targets are
2KV HBM / 500V CDM with 2KV IEC 61000-4-2 system stress capability.

Deliverables
Hard IP
  • Verilog
  • GDS
  • LEF/DEF
  • Timing (Lib file)
  • Extracted netlist
  • Datasheet
  • Integration guide
Foundries & Process Nodes
Foundry Process Nodes
TSMC 22nm ULL
Tech Specs
Class Value
Categories Interface Controller & PHY > I2C
Memory & Logic Library > I/O Library
Memory Controller & PHY > eMMC
PDK Version Various
Silicon Validated No
In Production? No
Metallization 1P7M_5X1Z no MIM
Key I/O Standards RGMII, eMMc, ONFI, SPI, QSPI, LVCMOS, LPDDR, I2C, SMBus Ultra-Low Leakage (100's pA per cell)
Availability All Countries & Regions
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