This silicon-proven, flip chip library in TSMC 22nm boasts three variants of GPIOs and one ODIO. All GPIO and ODIO
cells have NS and EW orientation. All GPIO types are classified based on speed: 25MHz, 75MHz and 150MHz. All GPIO
speed variants can operate at different post-driver voltage, which can be set at the system level and dynamically changed in
the system if needed. The I/O includes a weak pull-up or pull-down resistor (approx. 60 Ohms). The ODIO is designed for
lower speed interfaces but can be used as a high-voltage, high-speed input at up to 100MHz. The library is designed to allow
for independent power sequences of any I/O cell, which is accomplished with an intrinsic power-on-control architecture. In
the case of GPIO and ODIO, only when all powers are up and detected as ON, will the I/Os begin to function, otherwise they
will remain in a high impedance state. Beyond standard ESD protection, the library is tolerant to 61000-4-2 IEC standard to
2kV.
