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All IPs > Wireline Communication > Error Correction/Detection > 256B ECC Error Correction for MRAM

256B ECC Error Correction for MRAM

From Cyclic Design

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Description

The G12 module is engineered for 256B correction blocks and provides support for error corrections up to 16 bits. This unique capability is valuable for specialized applications where smaller block sizes are crucial. The design features optimized ECC dynamics, allowing for an adaptable block size range from 2 to 450 bytes. It is further customizable to maximize area efficiency by tailoring the maximum ECC level with set parameters. Additionally, it supports various configuration modes, catering to both single and multi-channel setups.

Features
  • Optimized for 256B correction blocks
  • Dynamically variable block sizes
Tech Specs
Class Value
Categories Wireline Communication > Error Correction/Detection
Security IP > Cryptography Cores
Platform Level IP > Processor Core Independent
Memory Controller & PHY > DDR
Memory Controller & PHY > SDRAM Controller
Correction Block Size 256B
Max Error Correction Capability 16 bits
Part Number G12-256B/ECC 2-16
Availability All Countries & Regions
Applications
  • Specialty applications
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